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 TP6312
1/4 TO 1/11-DUTY VFD CONTROLLER/DRIVER
General Description
The TP6312 is a VFD (Vacuum Fluorescent Display) controller/driver that is driven on a 1/4 to 1/11-duty factor. It consists of 11 segment output lines, 6 grid output lines, 5 segment/grid output drivelines, a display memory, a control circuit, and a Key scan circuit. Serial data is input to TP6312 through a This VFD controller/driver three-line serial interface. microcomputer.
Features
Multiple display modes (11-segment & 11-digit to 16-segment & 4-digit) Key scanning (6 x 4 matrices) Dimming circuit (eight steps) High-voltage output (VDD - 35V max) LED ports (4 chs, 20 mA max) General-purpose input port (4 bits) No external resistor necessary for driver outputs (P-ch open-drain + pull-down resistor output) Serial interface (CLK, STB, DIN, DOUT)
is ideal as a peripheral device of a single-chip
Ordering Information
TP 6312 Footprint Version Package Type Package Type F: LQFP S: 2.0 mm Footprint L: 3.2 mm
Block Diagram
Dimming circuit
Command decoder DIN
16-bit output latch
DOUT Serial I/F CLK STB Display memory 16bit x 11 word
16
11
Segment driver
Seg1
Seg11
5 R Segment/grid driver Seg12/Gird11 Data selector
OSC
Timing generator key scan 16-bit output latch
5
Seg16/Gird7
Key1 to Key4
11 4
6
Grid driver
Key data memory (4x6)
5 Grid1
Grid6
SW1 to SW4
4 bit latch
4 bit latch VDD (+5V) LED1 LED4 VSS (0V) VEE (-30V)
4
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TP6312
1/4 TO 1/11-DUTY VFD CONTROLLER/DRIVER
Pin Configuration (Top View)
Seg1 / Grid 10 3
26 S e g2 / Grid 11 1
Seg16 / Grid 7
Seg15 / Grid 8
Seg14 / Grid 9
Se g11
Se g10
24
Gr 5 id
Gr 6 id
33
32
31
30
27
25
23
29
28
Seg 9
VEE
Gr 4 id Gr 3 id Gr 2 id Gr 1 id VDD LED 4 LED 3 LED 2 LED 1 VSS OS C
Se g8 Se g7 S e g / KS6 6 S e g / KS5 5 S e g / KS4 4 S e g / KS3 3 S e g / KS2 2 S e g / KS1 1 VDD KE 4 Y KE 3 Y
34
35
36
37
38
40
41
42
43
44
10
KE 1 Y
Use all the power pins.
Pin Description
Pin No 6 5 Symbol DIN DOUT Pin Name Date input Date output Description Inputs serial data at rising edge of shift clock, starting from the lower bit. Outputs serial data at falling edge of shift clock, starting from the lower bit. This is N-ch open-drain output pin. Initializes the serial interface at rising or falling edge to make TP6312 waiting for reception of command. Data input after STB has fallen is processed as command. While command data is processed, current processing is stopped and serial interface is initialized. While STB is high, CLK is ignored. Reads serial data at rising edge, and outputs data at falling edge. Connects a resistor to this pin to determine the oscillation frequency to this pin. Segment output pins (Dual function as Key source). Segment output pins. Grid output pins. These pins are selectable for segment or grid driving. CMOS output. +20 mA max. Data input to these pins is latched at the end of display cycle. These pins constitute 4-bit general-purpose input port. 5V O 10% Connect this pin to system GND. VDD - 35 V max
9
STB
Strobe
8 44 15 to 20 21 to 25 37 to 32 26, 28 to 31 42 to 39 10 to 13 1 to 4 14, 38 7, 43 27
CLK OSC Seg1/KS1 to Seg6/KS6 Seg7 to Seg11 Grid1 to Grid6 Seg11/Grid11 to Seg16/Grid7 LED1 to LED4 Key1 to Key4 SW1 to SW4 VDD VSS VEE
Clock input Oscillator pin High-voltage output High-voltage output (Segment) High-voltage output (Grid) High-voltage output (Segment/grid) LED output Key data input Switch input Logic power Logic ground Pull-down level
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KE 2 Y
S W1
S W2
S W3
S W4
CL K
DOUT
VSS
ST B
DIN
11
1
2
3
4
5
6
7
8
9
12
13
14
15
16
17
39
18
19
20
21
22
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TP6312
1/4 TO 1/11-DUTY VFD CONTROLLER/DRIVER
Functional Description
Display RAM Address and Display Mode
The display RAM stores the data transmitted from an external device to TP6312 through the serial interface, and is assigned addresses as follows, in units of 8 bits: Seg1 00HL 02HL 04HL 06HL 08HL 0AHL 0CHL 0EHL 10HL 12HL 14HL b0 XX HL Lower 4 bits Seg4 00HU 02HU 04HU 06HU 08HU 0AHU 0CHU 0EHU 10HU 12HU 14HU b3 b4 XX HU Higher 4 bits.
On power application, all LEDs are unlit.
The data of each Key is stored as illustrated below, and is read by a read command, starting from the least significant bit. Key1 Key4 Key1 Key4 Seg2 / KS2 Seg1 / KS1 Seg3 / KS3 Seg5 / KS5
b0 b3 b4
Seg8 01HL 03HL 05HL 07HL 09HL 0BHL 0DHL 0FHL 11HL 13HL 15HL
Seg12
Seg16 DIG1 DIG2 DIG3 DIG4 DIG5 DIG6 DIG7 DIG8 DIG9 DIG10 DIG11
Seg4 / KS4 Seg6 / KS6
b7
Reading sequence
01HU 03HU 05HU 07HU 09HU 0BHU 0DHU 0FHU 11HU 13HU 15HU b7
LED Port
Data is written to the LED port by a write command, starting from the least significant bit of the port. When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED goes off. The data of bits 5 through 8 is ignored.
----
----
----
----
b3
b2
b1
b0 LED1 LED2 LED3 LED4
Don't care
Key Matrix and Key-Input Data Storage RAM
The Key matrix is of 6 x 4 configuration, as shown below.
KEY1 KEY2 KEY3 KEY4 Seg1/KS1 Seg2/KS2 Seg3/KS3 Seg4/KS4 Seg5/KS5 Seg6/KS6
SW Data
The SW data is read by a read command, starting from the least significant bit. SW data are 0.
MSB 0 0 0 0 b3 b2 b1 LSB b0 SW1 SW2 SW3 SW4
Bits 5 through 8 of the
Commands
A command sets the display mode and status of the VFD driver. The first 1 byte input to TP6312 through the DIN pin after the STB pin has fallen is regarded as a command. If STB is high while a command/data is transmitted, serial communication is initialized, and the transmitting command/data is invalid; however, the
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TP6312
1/4 TO 1/11-DUTY VFD CONTROLLER/DRIVER
command/data already transmitted remains valid. If address 16H or higher is set, the data is ignored and unit a correct address is set. On power application, the address is set to 00H.
(1) Display mode setting command
This command initializes TP6312 and selects the number of segments and number of grids (1/4 to 1/11duty, 11 segments to 16 segments). On power application, the 11-digit, 11-segment mode is selected.
MSB 0 0 ---------b2 b1 LSB b0
(4) Display control command
MSB 1 0 ------b3 b2 b1 LSB b0
Irrelevant
Irrelevant
Display mode settings 000 001 010 011 100 101 110 111 : : : : : : : : 4 digits, 16 segments 5 digits, 16 segments 6 digits, 16 segments 7 digits, 15 segments 8 digits, 14 segments 9 digits, 13 segments 10 digits, 12 segments 11 digits, 11 segments
Dimming quantity settings. 000 : Sets pulse width to 1/16. 001 : Sets pulse width to 2/16. 010 : Sets pulse width to 4/16. 011 : Sets pulse width to 10/16. 100 : Sets pulse width to 11/16. 101 : Sets pulse width to 12/16. 110 : Sets pulse width to 13/16. 111 : Sets pulse width to 14/16. Turns on/off display 0:Display off (key scan continues) 1:Display on.
On power application, the 14/16-pulse width is set and the display is turned off.
(2) Data setting commands
This command sets data write and read modes.
MSB 0 1 ------b3 b2 b1 LSB b0
Key Scanning and Display Timing
TDISPU 500 s Key scan data
SEG Output
DIG1
DIG2
DIG3
..............
DIGn
1
2
...
6
DIG1
G1
Irrelevant
Data write and read mode settings 00:Writes data to display memory 01:Writes data to LED port 10:Reads key data. 11:Reads SW data. Address increment mode (display memory). 0:Increments address after data has been written. 1:Fixes address. Test mode settings. 0:Normal operation. 1:Test mode.
G2
1/16 TDISP
G3
Gn
1 frame=TDISP x (n+1)
On power application, the normal operation mode and address increment mode set.
One cycle of Key scanning consists of two frames, and data of 6 x 4 matrices is stored in RAM.
(3) Address setting command
This command sets an address of the display memory.
Serial Communication Format Reception (command/data write)
STB
If data is cintiguous
MSB 1 1 ---b4 b3 b2 b1
LSB b0
DIN CLK
b0
b1
b2
KK
KK
b6
b7
Address (00H-15H)
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TP6312
1/4 TO 1/11-DUTY VFD CONTROLLER/DRIVER
Transmission (data read)
STB
Because the DOUT pin is an N-ch open-drain output pin, be sure to connect an external pull-up resistor to this pin (1k to 10 k).
DIN
b0
b1
b2
b3
b4
b5
b6
b7
*: When data is read, a wait time (tWAIT) of 1s is
CLK 1 2 3 4 5 6 7 8
tWAIT
1
2
3
4
5
6
necessary from the rising of the eighth clock that has set the command till the falling of the first clock that has read the data.
DOUT
b0
b1
b2
b3
b4
b5
Data reading command is set.
Data reading starts.
Absolute Maximum Ratings (Ta = 25C, Vss = 0V)
Parameter Logic Supply Voltage Driver Supply Voltage Logic Input Voltage VFD Driver Output Voltage LED Driver Output Current VFD Driver Output Current Power Dissipation Operating Ambient Temperature Storage Temperature * Derate at -6.4 mW/J at Ta = 25J Symbol VDD VEE Vi1 Vo2 Io1 Io2 PD Topt Tstg or higher. Ratings -0.5 to + 7.0 VDD +0.5 to VDD -40 -0.5 to VDD +0.5 VEE -0.5 to VDD +0.5 +25 -40 (grid) -15 (segment) 800* -40 to +70 -65 to +150 Unit V V V V mA mA mW J J
Recommended Operating Conditions (Ta = -20C to +70C, Vss = 0V)
Parameter Logic Supply Voltage High-Level input Voltage Low-Level input Voltage Driver Supply Voltage consumption. Where segment current = 3 mA, grid current = 15mA, and LED current = 20 mA, VFD driver dissipation = number of segments x 6 + number of grids/(number of grids + 1) x 30(mW) RL dissipation U (VDD-VEE)2/50 x (segment+1) (mW) LED driver dissipation = number of LEDs x 20(mW) Dynamic power consumption = VDD x 5(mW) Symbol VDD VIH VIL VEE Min. 4.5 0.7VDD 0 0 Typ. 5 Max. 5.5 VDD 0.3VDD VDD-35 Unit V V V V Test Condition
Maximum power consumption PMAX = VFD driver dissipation + RL dissipation + LED driver dissipation + dynamic power
Electrical Characteristics (Ta = -20C to +70C, VDD = 4.5V to 5.5V, VS = 0V, VEE = VDD - 35V)
Parameter High-Level Output Voltage Low-Level Output Voltage Low-Level Output Voltage High-Level Output Current High-Level Output Current Driver Leakage Current Output Pull-Down Resistor Input Current High-Level Input Voltage Low-Level Input Voltage Hysteresis Voltage Dynamic Current Consumption Symbol VOH1 VOL1 VOL2 IOH21 IOH22 IOLEAK RL Ii VIH VIL VH IDDdyn Min 0.9 VDD Typ. Max. 1 0.4 -3 -15 50 0.6 VDD 0.3 VDD 0.35 5 100 -10 150 1 Unit V V V mA mA A k A V V V mA Test Conditions LED1 - LED4, IOH1 = -1 mA LED1 - LED4, IOL1 = 20 mA DOUT, IOL2 = 4 mA VO = VDD -2V, Seg1 to Seg11 VO = VDD -2V,Grid1 to Grid6, Seg12/Seg 11 to Seg16/Seg 7 VO = VDD - 35V, Drive off Drive output VI = VDD or VSS
CLK, DIN, STB Under no load, display off
Version 1.1 September 2003
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TP6312
1/4 TO 1/11-DUTY VFD CONTROLLER/DRIVER
Switching Characteristics (Ta = -20C to +70C, VDD = 4.5V to 5.5V, VEE = -30V)
Parameter Oscillation Frequency Propagation Delay Time Symbol fOSC tPLZ tPZL tTZH1 tTZH2 tTHZ fmax C1 Min 350 Typ. 500 Max. 650 300 100 2 0.5 120 1 15 Unit kHz ns ns s s s MHz pF Test Conditions R = 56k CLK DOUT CL = 15pF,RL = 10k Seg1 to Seg11 Grid1 to Grid6 CL = 300 Seg12/Grid11 PF to Seg16/Grid7 CL = 300 pF, Segn, Gridn Duty = 50%
Rise Time
Fall Time Maximum Clock Frequency Input Capacitance
Timing Conditions (Ta = -20C to +70C, Vdd = 4.5V to 5.5V)
Parameter Clock Pulse Width Strobe Pulse Width Data Setup Time Data Hold Time Clock-Strobe Time Wait Time Symbol PWCLK PWSTB tSETUP tHOLD tCLK-STB tWAIT Min 400 1 100 100 1 1 Typ. Max. Unit ns s ns ns s s Test Conditions
CLK o/ CLK o/
STB o CLK o
Switching Characteristic Waveform
PW
STB
PW
CLK
PW
tCLK-STB
CLK
tSETUP
thold
tPZL
tPZL
tTHZ
tTHZ
90%
10%
Version 1.1 September 2003
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TP6312
1/4 TO 1/11-DUTY VFD CONTROLLER/DRIVER
Application
Updating display memory by incrementing address
STB
CLK
KK KK
DIN
Command1
Command2
Command3
Data 1
Data n
Command 4
Command1: Command2: Command3: Data 1 to n: Command4:
sets display mode sets data sets address transfers display data (22 bytes max.) controls display
Updating specific address
STB
CLK
DIN
Command1
Command2
Data
Command2
Data
Command1: Command2: Data:
sets data sets address display data
Version 1.1 September 2003
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TP6312
1/4 TO 1/11-DUTY VFD CONTROLLER/DRIVER
Package Information
44-Pin Plastic LQFP Short-Lead (Footprint = 2.0mm)
NOTE Each lead centerline is located within 0.16 mm of its true position (T.P.) at maximum material
A B
22
33
(Unit: mm)
23
Item A B C D E F G H I J K L M N O
1
1 1
E
F
Millimeters 12.0 0.2 10.0 0.2 12.0 0.2 10.0 0.2 0.37(TYP.) 0.8 BSC +0.2 0.3 -0.1 1.0 0.6 0.15 12o 1o 12o 1o 1.7 MAX 1.4 0.1 0 o MIN +7 o +3 o o -3
H
J
I
12
34 44
D
K
C
G
N M O L
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TP6312
1/4 TO 1/11-DUTY VFD CONTROLLER/DRIVER
44-Pin Plastic LQFP Long- Lead (Footprint = 3.2mm)
NOTE Each lead centerline is located within 0.16 mm of its
B
A
true position (T.P.) at maximum material (Unit: mm) Item A B C
D C
22
33
23
Millimeters 13.2 0.2 10.0 0.2 13.2 0.2 10.0 0.2 0.37(TYP.) 0.8 BSC 0.3 1.6 1.2 0.15 12o 1o 12o 1o 1.7 MAX 1.4 0.1 0 o MIN +3 o +7 o -3 o +0.2 -0.1
1
1 1
12
34 44
H
I
D E F G H I J K L M
E
F
J
N O
G
K
N M O L
Headquarters 5 F, No. 10, Prosperity Road 1, Science-Based Industrial Park, Hsinchu 300, Taiwan, R.O.C Tel.: 886-3-563-2515 Fax: 886-3-564-1728 * Taipei Office 5 F, No.27, Min Chuan W. Rd. Taipei 104, Taiwan, R.O.C Tel.: 886-2-2585-6858 Fax: 886-2-2594-1104 * Shenzhen Office Room 802, Tower A, World Trade Plaza, Fahong Rd., Fatian, Shenzhen, China Tel.: 86-755-8367-9985 Fax: 86-755-8367-9518 Version 1.1 September 2003 Page 9 of 9 http://www.topro.com.tw
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